About

QCEV99 is an independent publication and software project focused on vector computing, processor architecture and performance engineering.

The project takes its name from the citation shorthand associated with a 1999 research paper by Quintana, Corbal, Espasa and Valero examining the addition of vector execution to a superscalar processor.

That paper represents something larger than one specific design. It represents a recurring question in computer architecture:

How should hardware expose and exploit parallel work?

QCEV99 follows that question across generations of computing. From superscalar execution to SIMD. From fixed-width vectors to scalable vector architectures. From CPUs to GPUs. From vector arithmetic to matrix accelerators. And from research papers to the source code developers write every day.

What we do

Explain architecture

We publish detailed but approachable explanations of processor architecture, instruction sets and performance mechanisms.

Connect old ideas with new hardware

Modern processor concepts often have deep historical roots. We revisit influential research and show how architectural ideas evolved.

Experiment

Architecture becomes much easier to understand when it can be measured. Where possible, QCEV99 uses code examples, compiler output and reproducible experiments.

Build tools

We create small tools that help developers understand the relationship between software and processor behavior. QCEV Vector Inspector is the first.

Architecture without mythology

Processor discussions easily collapse into slogans. “Wider is faster.” “SIMD gives an 8× speedup.” “GPUs are massively parallel.” “Compilers optimize everything.”

Reality is more interesting. Architecture is a collection of tradeoffs involving execution resources, dependencies, memory behavior, instruction encoding, power, latency, throughput and software complexity. QCEV99 tries to explain those tradeoffs rather than repeat the slogans.

Independent by design

QCEV99 is independently operated. Coverage is not determined by processor vendors. Sponsored material, if ever published, must be clearly identified. Commercial relationships do not determine editorial conclusions. Products made by QCEV99 are clearly distinguished from editorial research.

Disclaimer

QCEV99 is not affiliated with the authors of the original QCEV99 research paper, their universities or institutions, ACM, IEEE, RISC-V International, Arm, Intel, AMD, NVIDIA or other organizations and companies discussed on this website. Company and product names belong to their respective owners.