A practical bridge from hardware performance counters to application analytics: how high-volume systems collect raw events, normalize them, detect anomalies, and turn noisy measurements into useful debugging and reporting signals.
Independent instructions in a sequential stream, and the limits on how many of them hardware can find.
A design-level comparison of the two ways a processor can get more work out of a cycle.
Multiple instructions per cycle, and the renaming, scheduling and retirement machinery that makes it safe.
Two very different approaches to extracting parallel work from an instruction stream: one discovers parallelism in hardware, the other lets software describe it.