Superscalar cores discover independent scalar instructions dynamically; vector architectures let software state data parallelism explicitly. Modern CPUs combine both ideas.
Instruction-level parallelism is the amount of independent work available among instructions in one thread. It is the raw material used by superscalar and out-of-order CPUs.
A superscalar processor can issue multiple independent instructions during the same cycle. Learn how fetch width, renaming, scheduling and execution resources make that possible.